Extending systemC to support mixed discrete-continuous system modeling and simulation

Systems on chip are more and more heterogeneous and include software, analog/RF and digital hardware, and non-electronic components such as sensors or actuators. The design and the verification of such systems require appropriate modeling means to deal with the increasing complexity and to achieve efficient simulation. SystemC is providing a modeling and simulation framework that supports digital (discrete) hardware and software systems from abstract specifications to register transfer level models. In the paper, we are proposing a way to extend the capabilities of SystemC to support mixed discrete-continuous systems by implementing a synchronous dataflow (SDF) model of computation (MoC). The SDF MoC is used to embed continuous-time behavior in SDF modules and to support the synchronization with the existing SystemC kernel. The paper presents an overview of the architecture and the syntax of the proposed extensions and gives modeling examples with simulation results

Effiziente Simulation von Logikimpulsen auf verlustbehafteten Mehrfachleitungen

In diesem Beitrag wird ein Ansatz zur Simulation von Logikimpulsen auf verlustbehafteten Mehrfachleitungen, wie z.B. SATA-Kabeln, vorgestellt, mit dem gegenüber herkömmlichen Methoden die Simulationszeit um Größenordnungen verringert werden kann. Dadurch ist es möglich, realistische Systemsimulationen in SystemC-AMS unter Berücksichtigung der Übertragungsverluste auf den Leitungen und der Effekte, die durch Übersprechen von benachbarten Leitungen herrühren, effizient durchzuführen. Das leitungsmodell ist in der Lage, die Frequenzcharakteristiken aus Dateien mit Meßdaten einzulesen und damit das Verhalten der Leitungen im Zeitbereich zu berechnen

Efficient transient simulation of lossy coupled interconnects in digital communication applications

In this paper a method is introduced for the simulation of high data rate logic pulses on lossy coupled lines, e.g. SATA cables. With the proposed method the simulation time can be reduced by about 250 times compared to conventional methods. This allows to accomplish realistic system simulations for exploration on architectural level in SystemC-AMS efficiently and with a minimum loss of accuracy. The line model includes also the transmission losses and the crosstalk between the lines. The time domain behaviour of the model is determined by the frequency characteristics of the lines resulting from files with measurement data

Localisation of cryptochrome 2 in the avian retina.

Cryptochromes are photolyase-related blue-light receptors acting as core components of the mammalian circadian clock in the cell nuclei. One or more members of the cryptochrome protein family are also assumed to play a role in avian magnetoreception, but the primary sensory molecule in the retina of migratory birds that mediates light-dependent magnetic compass orientation has still not been identified. The mRNA of cryptochrome 2 (Cry2) has been reported to be located in the cell nuclei of the retina, but Cry2 localisation has not yet been demonstrated at the protein level. Here, we provide evidence that Cry2 protein is located in the photoreceptor inner segments, the outer nuclear layer, the inner nuclear layer and the ganglion cell layer in the retina of night-migratory European robins, homing pigeons and domestic chickens. At the subcellular level, we find Cry2 both in the cytoplasm and the nucleus of cells residing in these layers. This broad nucleic expression rather points to a role for avian Cry2 in the circadian clock and is consistent with a function as a transcription factor, analogous to mammalian Cry2, and speaks against an involvement in magnetoreception

2 Siemens AG Munich

The effectiveness of a virtual test process is strongly determined by the effort required to create the DUT and DIB models as well as by the performance and the accuracy of the virtual test environment. A methodology is introduced for re-using well verified system level models for a fast and reliable test simulation process. First experimental results are presented for a complex mixed-signal telecom device.

Virtual test of complex mixed-signal telecommunication circuits reusing system-level models

The effectiveness of a virtual test process is strongly determined by the effort required to create the DUT and DIB models as well as by the performance and the accuracy of the virtual test environment. A methodology is introduced for re-using well verified system level models for a fast and reliable test simulation process. First experimental results are presented for a complex mixed-signal telecom device

From system specification to layout: seamless top-down design methods for analog and mixed-signal applications

Design automation for analog/mixed-signal (A/MS) circuits and systems is still lagging behind compared to what has been reached in the digital area. As System-on-Chip (SoC) designs include analog components in most cases, these analog parts become even more a bottleneck in the overall design process. The paper is dedicated to latest R&D activities within the MEDEA+ project ANASTASIA+. Main focus will be the development of seamless top-down design methods for integrated analog and mixed-signal systems and to achieve a high level of automation and reuse in the A/MS design process. These efforts are motivated by the urgent need to close the current gap in the industrial design flow between system specification and design on the one hand and block-level circuit design on the other hand. The paper will focus on three subtopics starting with the topdown design flow with applications from circuit sizing, design centering, and automated behavioral modeling. The next part focuses on modeling and simulation of specific functionalities in sigma-delta design while the last section is dedicated to a mixed-signal System-on-Chip design environment. 1